Exploring memory organization in virtual MP-SoC platforms

Authors:
Bruno Cruz Oliveira;Márcio Eduardo Kreutz;Edgard de Faria Corrêa;Ivan Saraiva Silva
Affiliations:
Universidade Federal do Rio Grande do Norte, Natal, Brazil;Universidade Federal do Rio Grande do Norte, Natal, Brazil;Universidade Federal do Rio Grande do Norte, Natal, Brazil;Universidade Federal do Piauí, Teresina, Brazil
Venue:
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Year:
2010

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Abstract

This paper presents two memory organizations exploration for MP-SoC virtual platforms. A general purpose platform is presented alongside its description in SystemC. The STORM platform allows one to describe architectures comprising Processors, Networks-on-Chip (NoCs) and Cache memories. The focus of this paper is to evaluate the impact of shared and distributed memories organizations in the design constraints of multiprocessor systems, focusing on latency for packets in communications architectures and on the average number of cycles applications need to execute all their instructions. To evaluate such scenarios, cache memories configurations were submitted to a Oil Reservoir Simulation application, running in specific instances of STORM.