Automatic synthesis of interfaces between incompatible protocols
DAC '98 Proceedings of the 35th annual Design Automation Conference
Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Synthesizing Converters Between Finite State Protocols
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Convertibility verification and converter synthesis: two faces of the same coin
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Bridge Over Troubled Wrappers: Automated Interface Synthesis
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Automatic Generation of Protocol Converters from Scenario-Based Specifications
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
Synthesis of Communication Structures and Protocols in Distributed Embedded Systems
RSP '05 Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
Protocol Transducer Synthesis using Divide and Conquer approach
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
A Module Checking Based Converter Synthesis Approach for SoCs
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Interface synthesis and protocol conversion
Formal Aspects of Computing
A Model Checking Approach to Protocol Conversion
Electronic Notes in Theoretical Computer Science (ENTCS)
A formal approach to the protocol converter problem
Proceedings of the conference on Design, automation and test in Europe
Formally Synthesising a Protocol Converter: A Case Study
CIAA '09 Proceedings of the 14th International Conference on Implementation and Application of Automata
High-fidelity Markovian power model for protocols
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.00 |
Reuse of components is a burgeoning field in chip design. Shorter time to market and assured quality are just two good reasons to reuse previously engineered components. Problems arise however when chip designers need to interface these components as they typically conform to different standards, or no standards at all. The popular model of interfacing components such as protocols is via a 'converter' that translates data between the components. We develop a theoretical model of a converter that will enable two given arbitrary protocols to communicate. This model includes buffers. We formally define correctness conditions, and guarantee that the resulting converter satisfies these conditions. We also allow the designer to define his own (CTL) conditions. As well, we allow protocols to be nondeterministic, and we ensure only valid data is sent to the converter. The verification of the conditions is carried out by a model checker (not reported in this work). We have implemented our theoretical model and we present experimental results.