AVGS-Mux style: a novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics

Authors:
Bahman Kheradmand-Boroujeni;Christian Piguet;Yusuf Leblebici
Affiliations:
CSEM, Neuchâtel, Switzerland and EPFL, Lausanne, Switzerland;CSEM, Neuchâtel, Switzerland;EPFL, Lausanne, Switzerland
Venue:
Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2010

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Abstract

This work presents Adaptive Vgs Multiplexer (AVGS-Mux) Technique. Proposed method controls the transistor current by the source voltage. It can provide ±1.6X control on the delay and ±7X exponential control on sub-threshold and gate leakages in the switch-box, LUT, and interconnects. For equal leakage, it improves the speed 9%, reduces dynamic power 13%, and reduces random dopant fluctuations effect. AVGS-Mux is a good replacement of adaptive body biasing and adaptive supply voltage techniques in emerging Multi-Gate devices which have very small body effect and cannot tolerate voltages higher than nominal VDD due to reliability issues.