A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Optimal Extension Fields for Fast Arithmetic in Public-Key Algorithms
CRYPTO '98 Proceedings of the 18th Annual International Cryptology Conference on Advances in Cryptology
A Compact Rijndael Hardware Architecture with S-Box Optimization
ASIACRYPT '01 Proceedings of the 7th International Conference on the Theory and Application of Cryptology and Information Security: Advances in Cryptology
An Optimized S-Box Circuit Architecture for Low Power AES Design
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A very compact "Perfectly masked" S-box for AES
ACNS'08 Proceedings of the 6th international conference on Applied cryptography and network security
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Efficient hardware implementation of the stream cipher WG-16 with composite field arithmetic
Proceedings of the 3rd international workshop on Trustworthy embedded devices
AES side-channel countermeasure using random tower field constructions
Designs, Codes and Cryptography
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A lot of improvements and optimizations for the hardware implementation of SubBytes of Rijndael, in detail inversion in F28 have been reported. Instead of the Rijndael original F28, it is known that its isomorphic tower field F((22)2)2 has a more efficient inversion. For the towerings, several kinds of bases such as polynomial and normal bases can be used in mixture. Different from the meaning of this mixture of bases, this paper proposes another mixture that contributes to the reduction of the critical path delay of SubBytes. To the F(22)2-inversion architecture, for example, the proposed mixture inputs and outputs elements represented with normal and polynomial bases, respectively.