Small forwarding tables for fast routing lookups
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
Fast address lookups using controlled prefix expansion
ACM Transactions on Computer Systems (TOCS)
PATRICIA—Practical Algorithm To Retrieve Information Coded in Alphanumeric
Journal of the ACM (JACM)
Multiway range trees: scalable IP lookup with fast updates
Computer Networks: The International Journal of Computer and Telecommunications Networking
Tree bitmap: hardware/software IP lookups with incremental updates
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A Tree Based Router Search Engine Architecture with Single Port Memories
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Survey and taxonomy of packet classification techniques
ACM Computing Surveys (CSUR)
CAMP: fast and efficient IP lookup architecture
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Range trees with variable length comparisons
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
IP-address lookup using LC-tries
IEEE Journal on Selected Areas in Communications
Survey and taxonomy of IP address lookup algorithms
IEEE Network: The Magazine of Global Internetworking
Algorithms for packet classification
IEEE Network: The Magazine of Global Internetworking
End-to-end congestion management for non-blocking multi-stage switching fabrics
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Bit-shuffled trie: a new approach for IP address lookup
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
400 Gb/s Programmable Packet Parsing on a Single FPGA
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
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In this paper we introduce the Range Trie, a new multiway tree data structure for address lookup. Each Range Trie node maps to an address range [Na, Nb) and performs multiple comparisons to determine the subrange an incoming address belongs to. Range Trie improves on the existing Range Trees allowing shorter comparisons than the address width. The maximum comparison length in a Range Trie node is [log2 (Nb -- Na)] bits. Address parts can be shared among multiple concurrent comparisons or even omitted. Addresses can be properly aligned to further reduce the required address bits per comparison. In so doing, Range Tries can store in a single tree node more address bounds to be compared. Given a memory bandwidth, more comparisons are performed in a single step reducing lookup latency, memory accesses per lookup, and overall memory requirements. Latency and memory size scale better than related works as the address width and the number of stored prefixes increase. Considering memory bandwidth of 256-bits per cycle, five to seven Range Trie levels are sufficient to store half a million IPv4 or IPv6 prefixes, while memory size is comparable and in many cases better than linear search. We describe a Range Trie hardware design and evaluate our approach in terms of performance, area cost and power consumption. Range Trie 90-nm ASIC implementations, storing 0.5 million IPv4 and IPv6 prefixes, perform over 500 million lookups per second (OC-3072) and consume 3.9 and 11.4 Watts respectively.