Logic testing and design for testability
Logic testing and design for testability
Testing in software development
Testing in software development
Object-oriented design
Object-oriented analysis (2nd ed.)
Object-oriented analysis (2nd ed.)
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
An IEEE 1149.1 Based Logic/Signature Analyzer in a Chip
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Macro Testability: The Results of Production Device Applications
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Minimizing Test Time by Exploiting Parallelism in Macro Test
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Macro Testing: Unifying IC And Board Test
IEEE Design & Test
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As modern digital hardware/software systems become more complex, the testing of these systems throughout their entire system life cycle, including design verification. production testing. and field testing. becomes a severe problem. In this paper a structured approach is presented to solve the problems of system-level testability. A strategy towards design for system-level testability is introduced. which consists of partitioning the system specification into testable parts. and inserting implementation-independent test functionality in the specification. Incorporating these test requirements in the hardware/ software implementation will considerably improve system-level testability. The design and implementation of a traffic-lights control system is presented as an example to illustrate the benefits of this approach.