On-chip power network optimization with decoupling capacitors and controlled-ESRs

  • Authors:
  • Wanping Zhang;Ling Zhang;Amirali Shayan;Wenjian Yu;Xiang Hu;Zhi Zhu;Ege Engin;Chung-Kuan Cheng

  • Affiliations:
  • Qualcomm Inc., San Diego, CA and UC San Diego, La Jolla, CA;UC San Diego, La Jolla, CA;UC San Diego, La Jolla, CA;Tsinghua University, Beijing, China;UC San Diego, La Jolla, CA;Qualcomm Inc., San Diego, CA;San Diego State University, San Diego, CA;UC San Diego, La Jolla, CA

  • Venue:
  • Proceedings of the 2010 Asia and South Pacific Design Automation Conference
  • Year:
  • 2010

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Abstract

In this paper, we propose an efficient approach to minimize the noise on power networks via the allocation of decoupling capacitors (decap) and controlled equivalent series resistors (ESR). The controlled-ESR is introduced to reduce the on-chip power voltage fluctuation, including both voltage drop and overshoot. We formulate an optimization problem of noise minimization with the constraint of decap budget. A revised sensitivity calculation method is derived to consider both voltage drop and overshoot. The sequential quadratic programming (SQP) algorithm is adopted to solve the optimization problem where the revised sensitivity is regarded as the gradient. Experimental results show that considering voltage drop without overshoot leads to underestimating noise by 4.8%. We also demonstrate that the controlled-ESR is able to reduce the noise by 25% with the same decap budget.