Performance optimization using exact sensitization
DAC '94 Proceedings of the 31st annual Design Automation Conference
Logic decomposition during technology mapping
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A delay model for logic synthesis of continuously-sized networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Speeding up technology-independent timing optimization by network partitioning
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Performance optimization under rise and fall parameters
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Performance optimization using separator sets
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Efficient global fanout optimization algorithms
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Timing driven gate duplication in technology independent phase
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Technology-based transformations
Logic Synthesis and Verification
An exact gate assignment algorithm for tree circuits under rise and fall delays
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Layout-driven Timing Optimization by Generalized De Morgan Transform
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A robust detailed placement for mixed-size IC designs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Optimizing sequential cycles through Shannon decomposition and retiming
Proceedings of the conference on Design, automation and test in Europe: Proceedings
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