Arithmetic for an SVD processor
Journal of Parallel and Distributed Computing - Parallelism in Computer Arithmetic
Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD
IEEE Transactions on Computers
A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms
Integration, the VLSI Journal
IEEE Transactions on Computers
CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
Decimal Floating-Point: Algorism for Computers
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics
IEEE Transactions on Computers
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
Elementary Functions: Algorithms and Implementation
Elementary Functions: Algorithms and Implementation
Decimal floating-point in z9: an implementation and testing perspective
IBM Journal of Research and Development
A Cordic Arithmetic Processor Chip
IEEE Transactions on Computers
Fourier Transform Computers Using CORDIC Iterations
IEEE Transactions on Computers
A unified algorithm for elementary functions
AFIPS '71 (Spring) Proceedings of the May 18-20, 1971, spring joint computer conference
Fully Redundant Decimal Arithmetic
ARITH '09 Proceedings of the 2009 19th IEEE Symposium on Computer Arithmetic
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
Digital Signal Processing
Decimal floating-point support on the IBM system z10 processor
IBM Journal of Research and Development
The use of CORDIC in software defined radios: a tutorial
IEEE Communications Magazine
Hi-index | 0.00 |
CORDIC is a well-known method to approximate mathematical functions. It basically works as an iterative algorithm for approximating rotation of a two-dimensional vector using only shift and add operations. The method has been widely applied in the design of digital signal processors and in the computation of typical signal processing functions. It was specifically developed to process data expressed in radix-2. On the other hand, decimal computation has been gaining renewed interest over the last few years, and high performance decimal computation systems are being required on different scopes. In this paper, an improved CORDIC-based method so as to approximate functions on decimal operands is proposed. The algorithm will work with BCD operands, so no conversion to/from radix-2 is needed. An important reduction in the number of iterations in comparison to other CORDIC methods is achieved. The new algorithm is implemented on an FPGA so as to obtain results on delay and hardware resources. The experiments showing the advantages of the new method, with regard to both delay and precision, are described.