Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
VLSI Architectures for multidimensional fourier transform processing
IEEE Transactions on Computers
Optimal concurrent VLSI architectures for 2-D transposition
Proceedings of the 1991 University of California/Santa Cruz conference on Advanced research in VLSI
Introduction to parallel algorithms and architectures: array, trees, hypercubes
Introduction to parallel algorithms and architectures: array, trees, hypercubes
VLSI Architectures for Multidimensional Transforms
IEEE Transactions on Computers
The arithmetic cube II and memory-based architectures for data structure manipulation
The arithmetic cube II and memory-based architectures for data structure manipulation
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
A Fast Computer Method for Matrix Transposing
IEEE Transactions on Computers
IEEE Transactions on Computers
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A VLSI architecture for separable kernel multi-dimensional transforms is described. What is novel about the architecture is its data rotator [1, 4], which is a hexagonal mesh of processors. The rotator is completely scalable and modular and is programmable with respect to d and the length of each dimension. The proposed architecture has an AT2 figure of O(d2n2log2 n) [6], where d is the dimensionality, n is the total number of elements in the data cube, and the precision of an element is assumed to be Θ(log n). The value of AT2 for the rotator itself is O(n2 log2 n) [6] for a single rotation, which is optimal. Multi-dimensional separable kernel transforms may be computed by performing d sets of 1-D transforms, each along a unique axis of the d-D data cube. A natural architecture for such problems consists of a number of 1-D transform processors and a rotator or transposer [1, 2, 4, 5].