Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Montgomery's Multiplication Technique: How to Make It Smaller and Faster
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable Architecture for Montgomery Multiplication
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
High-Radix Design of a Scalable Modular Multiplier
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
FPGA-Based Implementation of a Serial RSA Processor
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Scalable Architecture for RSA Cryptography on Large FPGAs
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Design and test issues of a FPGA based data acquisition system for medical imaging using PEM
RTC'05 Proceedings of the 14th IEEE-NPSS conference on Real time
A novel AES-256 implementation on FPGA using co-processor based architecture
Proceedings of the International Conference on Advances in Computing, Communications and Informatics
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Field Programmable Gate Array (FPGA) devices are coming very strongly in the digital hardware systems due to the availability of ready to use resources, parallel logic operations and reconfigurable designs. The usage of FPGA systems in real time domain is also a very fruitful proposition as the FPGA devices are coming with processing cores for Real Time data processing. In a complex system scenario involving a large amount of processing tasks, there is a requirement of building the system using multiple FPGA devices. To make this possible we have to establish a real time data communication between the FPGA devices and to make it even better we have to apply data encryption techniques for making this communication secured. In this paper we demonstrate the design and implementation of a 32-bit RSA algorithms by developing suitable Hardware and Software design on Xilinx Spartan- 3E (XC3S500E-FG320) device, the implementation has been tested successfully for real time serial data communication between multiple FPGA devices using the RS232 serial interface. This development work is also useful for the embedded applications, which requires on board execution of security algorithms. The system is optimized in terms of execution speed and also has been verified using real time debugging tools.