Error-control coding for computer systems
Error-control coding for computer systems
Reed-Solomon Codes and Their Applications
Reed-Solomon Codes and Their Applications
Architecture for decoding adaptive Reed-Solomon codes with variable block length
IEEE Transactions on Consumer Electronics
An Improved Double Byte Error Correcting Code Using Cellular Automata
ACRI '08 Proceedings of the 8th international conference on Cellular Automata for Reseach and Industry
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Area-efficient Reed-Solomon decoder design for optical communications
IEEE Transactions on Circuits and Systems II: Express Briefs
High-speed architecture for three-parallel Reed-Solomon decoder using S-DCME
Proceedings of the 4th International Conference on Uniquitous Information Management and Communication
Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications
Journal of Signal Processing Systems
New Cost-Effective Simplified Euclid's Algorithm for Reed-Solomon Decoders
Journal of Signal Processing Systems
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This paper proposes a new degree computationless modified Euclid (DCME) algorithm and its dedicated architecture for Reed-Solomon (RS) decoder. This architecture has low hardware complexity compared with conventional modified Euclid (ME) architectures, since it can completely remove the degree computation and comparison circuits. The architecture employing a systolic array requires only the latency of 2t clock cycles to solve the key equation without initial latency. In addition, the DCME architecture using 3t+2 basic cells has regularity and scalability since it uses only one processing element. Hence, the proposed DCME architecture provides the short latency and low-cost RS decoding. The DCME architecture has been synthesized using the 0.25-µm Faraday CMOS standard cell library and operates at 200 MHz. The gate count of the DCME architecture is 21 760. Hence, the RS decoder using the proposed DCME architecture can reduce the total gate count by at least 23% and the total latency to at least 10% compared with conventional ME decoders.