Introduction to algorithms
Simultaneous escape routing and layer assignment for dense PCBs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Printed Circuits Handbook
Optimal bus sequencing for escape routing in dense PCBs
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Optimal layer assignment for escape routing of buses
Proceedings of the 2009 International Conference on Computer-Aided Design
A Length-Matching Routing Algorithm for High-Performance Printed Circuit Boards
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Density-reduction-oriented layer assignment for rectangle escape routing
Proceedings of the great lakes symposium on VLSI
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In this paper, based on the optimal feature of a left-edge algorithm for interval packing, a modified left-edge algorithm is proposed to optimally solve the layer assignment problem for bus-oriented escape routing. Firstly, a set of assignment constraints for the overlapping relations of the left or right projection intervals and the crossing relations of all the buses between two adjacent pin arrays is generated. Furthermore, with the consideration of the assignment constraints, an optimal constraint-aware algorithm is proposed to minimize the number of assigned layers and assign all the buses onto the used layers. Compared with Kong's heuristic algorithm[4], it is proved that our proposed optimal algorithm guarantees that the number of assigned layers is minimized and the experimental results show that our proposed algorithm reduces 8.8% of assigned layers for eight tested examples on the average. Compared with Yan's O(n2.38) optimal algorithm[5], it is proved that our proposed optimal algorithm has better time complexity in O(n2) time and the experimental results show that our proposed algorithm reduces 33.6% of CPU time for eight tested examples on the average.