Genetic defect based march test generation for SRAM

  • Authors:
  • Stefano Di Carlo;Gianfranco Politano;Paolo Prinetto;Alessandro Savino;Alberto Scionti

  • Affiliations:
  • Politecnico di Torino, Control and Computer Engineering Department, Torino, Italy;Politecnico di Torino, Control and Computer Engineering Department, Torino, Italy;Politecnico di Torino, Control and Computer Engineering Department, Torino, Italy;Politecnico di Torino, Control and Computer Engineering Department, Torino, Italy;Politecnico di Torino, Control and Computer Engineering Department, Torino, Italy

  • Venue:
  • EvoApplications'11 Proceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II
  • Year:
  • 2011

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Abstract

The continuos shrinking of semiconductor's nodes makes semiconductor memories increasingly prone to electrical defects tightly related to the internal structure of the memory. Exploring the effect of fabrication defects in future technologies, and identifying new classes of functional fault models with their corresponding test sequences, is a time consuming task up to now mainly performed by hand. This paper proposes a new approach to automate this procedure exploiting a dedicated genetic algorithm.