Cache-tuning-aware scratchpad allocation from binaries

  • Authors:
  • Daniel Pereira Volpato;Alexandre Keunecke Ignácio Mendonca;José Luís Almada Güntzel;Luiz Cláudio Villar dos Santos

  • Affiliations:
  • Federal University of Santa Catarina, Florianopolis, Brazil;Federal University of Santa Catarina, Florianopolis, Brazil;Federal University of Santa Catarina, Florianopolis, Brazil;Federal University of Santa Catarina, Florianopolis, Brazil

  • Venue:
  • Proceedings of the 24th symposium on Integrated circuits and systems design
  • Year:
  • 2011

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Abstract

The literature on scratchpad memories (SPMs) seems to indicate that the use of dynamic overlaying supersedes static, non-overlay-based (NOB) allocation. Although overlay-based (OVB) techniques operating at source-level code might benefit from multiple hot spots for higher energy savings, they cannot exploit libraries. When operating on binaries, OVB approaches lead to smaller savings, often require dedicated hardware, and sometimes prevent data allocation. Besides, all saving reports published so far ignore that, in cache-based systems, caches are likely to be optimized prior to SPM allocation. We show experimental evidence that, when handling binaries, NOB memory savings (15% to 33% on average) are as good as or better than OVB's. Since our savings (as opposed to related work) were measured after cache tuning -- when there is less room for optimization, our results encourage the use of simpler NOB methods to build library aware allocators that cannot depend on dedicated hardware. We also show that, given the capacity Ct of the equivalent pretuned cache, the optimal SPM size lies in [Ct/2, Ct] for 85% of the evaluated programs. Finally, we show counter-intuitive evidence that, even for cache-based architectures containing small SPMs, procedures should be preferred for allocation instead of basic blocks.