A multistage linear array assignment problem
Operations Research
Conjoined-Core Chip Multiprocessing
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Design methodology for pipelined heterogeneous multiprocessor system
Proceedings of the 44th annual Design Automation Conference
Combining multicore and reconfigurable instruction set extensions
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Runtime reconfiguration of custom instructions for real-time embedded systems
Proceedings of the Conference on Design, Automation and Test in Europe
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Application-specific heterogeneous multiprocessor synthesis using extensible processors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DRMA: dynamically reconfigurable MPSoC architecture
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Online scheduling for multi-core shared reconfigurable fabric
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Processor customization in the form of application specific instructions can provide significant power and performance boost to an embedded application while maintaining high flexibility. The emergence of multi-core architectures opens up the possibility of creating an application-specific heterogeneous computing platform by customizing a set of homogeneous cores. We propose a multi-core architecture where the cores share a reconfigurable fabric that accommodates the custom instructions. We develop an efficient algorithm that exploits this shared fabric through customization and runtime reconfiguration to minimize the execution time of multi-threaded applications. Experimental results reveal that shared reconfigurable fabric helps applications achieve substantial speedup compared to per-core private fabrics.