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ACM Computing Surveys (CSUR)
Compile-time analysis of communicating processes
ICS '92 Proceedings of the 6th international conference on Supercomputing
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Papers presented at the IEEE symposium on Logic in computer science
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IEEE Transactions on Software Engineering - Special issue: best papers of the 1996 international symposium on software testing and analysis ISSTA'96
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Formal Methods in System Design - Special issue on symmetry in automatic verification
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Synthesis of concurrent systems with many similar processes
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Computing Surveys (CSUR)
Some Deadlock Properties of Computer Systems
ACM Computing Surveys (CSUR)
Modern Operating Systems
Distributed Algorithms
Symbolic Model Checking
A Discipline of Programming
Introduction to Algorithms
Partial Order Reduction: Model-Checking Using Representatives
MFCS '96 Proceedings of the 21st International Symposium on Mathematical Foundations of Computer Science
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
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CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Parameterized Verification with Automatically Computed Inductive Assertions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
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CADE-17 Proceedings of the 17th International Conference on Automated Deduction
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SOFSEM '07 Proceedings of the 33rd conference on Current Trends in Theory and Practice of Computer Science
A Polynomial-Time Checkable Sufficient Condition for Deadlock-Freedom of Component-Based Systems
SOFSEM '07 Proceedings of the 33rd conference on Current Trends in Theory and Practice of Computer Science
Robustness in Interaction Systems
FORTE '07 Proceedings of the 27th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Compositional analysis of deadlock-freedom for tree-like component architectures
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
RP '09 Proceedings of the 3rd International Workshop on Reachability Problems
Ensuring properties of interaction systems
Program analysis and compilation, theory and practice
Reachability in Tree-Like Component Systems is PSPACE-Complete
Electronic Notes in Theoretical Computer Science (ENTCS)
Deadlock-freedom in component systems with architectural constraints
Formal Methods in System Design
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We present two polynomial-time algorithms for automatic verification of deadlock-freedom of large finite-state concurrent programs. We consider shared-memory concurrent programs in which a process can nondeterministically choose amongst several (enabled) actions at any step. As shown in [23], deadlock-freedom analysis is NP-hard even for concurrent programs of restricted form (no nondeterministic choice). Therefore, research in this area concentrates either on the search for efficiently checkable sufficient conditions for deadlock-freedom, or on improving the complexity of the check in some special cases. In this paper, we present two efficiently checkable sufficient conditions for deadlock freedom. Our algorithms apply to programs which are expressed in a particular syntactic form, in which variables are shared between pairs of processes. The first algorithm improves the complexity of the deadlock check of Attie and Emerson [4] to polynomial in all parameters, as opposed to the exponential complexity of [4]. The second algorithm involves a conceptually new construction of a “global wait-for graph” for all processes. Its running time is also polynomial in all its parameters, and it is more discriminating than the first algorithm. We illustrate our algorithms by applying them to several examples of concurrent programs that implement resource allocation and priority queues. To the best of our knowledge, this is the first work that describes polynomially checkable conditions for assuring deadlock freedom of large concurrent programs.