Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches
IEEE Transactions on Computers
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
Using a Multipath Network for Reducing the Effects of Hot Spots
IEEE Transactions on Parallel and Distributed Systems
Current issues in packet switch design
ACM SIGCOMM Computer Communication Review
Global Reactive Congestion Control in Multicomputer Networks
HIPC '98 Proceedings of the Fifth International Conference on High Performance Computing
Self-Tuned Congestion Control for Multiprocessor Networks
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Providing full qos support in clusters using only two VCs at the switches
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
Dynamic evolution of congestion trees: analysis and impact on switch architecture
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
High-throughput differentiated service provision router architecture for wireless network-on-chip
International Journal of High Performance Systems Architecture
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Congestion management and quality of service (QoS) provision are two important issues in current network design. The most popular techniques proposed for both issues require the existence of specific resources in the interconnection network, usually a high number of separate queues at switch ports. Therefore, the implementation of these techniques is expensive or even infeasible. However, two novel, efficient, and cost-effective techniques for provision of QoS and for congestion management have been proposed recently. In this paper, we combine those techniques to build a single interconnection network architecture, providing an excellent performance while reducing the number of required resources.