Distributing Hot-Spot Addressing in Large-Scale Multiprocessors
IEEE Transactions on Computers
Chaos router: architecture and performance
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches
IEEE Transactions on Computers
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Highly parallel computing (2nd ed.)
Highly parallel computing (2nd ed.)
Using a Multipath Network for Reducing the Effects of Hot Spots
IEEE Transactions on Parallel and Distributed Systems
Prevention of Congestion in Packet-Switched Multistage Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Compressionless Routing: A Framework for Adaptive and Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
A new method to make communication latency uniform: distributed routing balancing
ICS '99 Proceedings of the 13th international conference on Supercomputing
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Reducing Hot-Spot Contention in Shared-Memory Multiprocessor Systems
IEEE Concurrency
The Use of Feedback in Multiprocessors and Its Application to Tree Saturation Control
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing Algorithms for the 3D-Torus: Limitations and Solutions
PARLE '93 Proceedings of the 5th International PARLE Conference on Parallel Architectures and Languages Europe
Global Reactive Congestion Control in Multicomputer Networks
HIPC '98 Proceedings of the Fifth International Conference on High Performance Computing
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch
HPCA '98 Proceedings of the 4th International Symposium on High-Performance Computer Architecture
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
BLAM: A High-Performance Routing Algorithm for Virtual Cut-Through Networks
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Self-Tuned Congestion Control for Multiprocessor Networks
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Alleviating Memory Contention in Matrix Computations on Large-Scale Shared-Memory Multiprocessors
Alleviating Memory Contention in Matrix Computations on Large-Scale Shared-Memory Multiprocessors
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Globally Adaptive Load-Balanced Routing on Tori
IEEE Computer Architecture Letters
Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
IEEE Computer Architecture Letters
A taxonomy for congestion control algorithms in packet switching networks
IEEE Network: The Magazine of Global Internetworking
Towards an efficient switch architecture for high-radix switches
Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
HiPC'08 Proceedings of the 15th international conference on High performance computing
OBQA: Smart and cost-efficient queue scheme for Head-of-Line blocking elimination in fat-trees
Journal of Parallel and Distributed Computing
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
InfiniBand congestion control: modelling and validation
Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques
Channel reservation protocol for over-subscribed channels and destinations
SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
BBQ: a straightforward queuing scheme to reduce hol-blocking in high-performance hybrid networks
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
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Designers of large parallel computers and clusters are becoming increasingly concerned with the cost and power consumption of the interconnection network. A simple way to reduce them consists of reducing the number of network components and increasing their utilization. However, doing so without a suitable congestion management mechanism may lead to dramatic throughput degradation when the network enters saturation. Congestion management strategies for lossy networks (computer networks) are well known, but relatively little effort has been devoted to congestion management in lossless networks (parallel computers, clusters, and on-chip networks). Additionally, congestion is much more difficult to solve in this context due to the formation of congestion trees. In this paper we study the dynamic evolution of congestion trees. We show that, contrary to the common belief, trees do not only grow from the root toward the leaves. There exist cases where trees grow from the leaves to the root, cases where several congestion trees grow independently and later merge, and even cases where some congestion trees completely overlap while being independent. This complex evolution and its implications on switch architecture are analyzed, proposing enhancements to a recently proposed congestion management mechanism and showing the impact on performance of different design decisions.