Model checking for programming languages using VeriSoft
Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Partial-Order Reduction in Symbolic State-Space Exploration
Formal Methods in System Design - Special issue on CAV '97
Symbolic Model Checking
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
Static Partial Order Reduction
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Dynamic partial-order reduction for model checking software
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Proof-guided underapproximation-widening for multi-process systems
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Optimistic synchronization-based state-space reduction
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Bounded model checking of concurrent programs
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symbolic model checking for asynchronous boolean programs
SPIN'05 Proceedings of the 12th international conference on Model Checking Software
Sound transaction-based reduction without cycle detection
SPIN'05 Proceedings of the 12th international conference on Model Checking Software
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Efficient Modeling of Concurrent Systems in BMC
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Semantic Reduction of Thread Interleavings in Concurrent Programs
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Reduction of Verification Conditions for Concurrent System Using Mutually Atomic Transactions
Proceedings of the 16th International SPIN Workshop on Model Checking Software
Symbolic pruning of concurrent program executions
Proceedings of the the 7th joint meeting of the European software engineering conference and the ACM SIGSOFT symposium on The foundations of software engineering
Graded-CTL: Satisfiability and Symbolic Model Checking
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Peephole partial order reduction
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
An automata-theoretic approach to infinite-state systems
Time for verification
Boosting lazy abstraction for systemc with partial order reduction
TACAS'11/ETAPS'11 Proceedings of the 17th international conference on Tools and algorithms for the construction and analysis of systems: part of the joint European conferences on theory and practice of software
Verifying SystemC: a software model checking approach
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Scalable and precise program analysis at NEC
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
LLVMVF: A Generic Approach for Verification of Multicore Software
Journal of Electronic Testing: Theory and Applications
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The state explosion problem is one of the core bottlenecks in the model checking of concurrent software. We show how to ameliorate the problem by combining the ability of partial order techniques to reduce the state space of the concurrent program with the power of symbolic model checking to explore large state spaces. Our new verification methodology involves translating the given concurrent program into a circuit-based model which gives us the flexibility to then employ any model checking technique of choice – either SAT or BDD-based – for verifying a broad range of linear time properties, not just safety. The reduction in the explored state-space is obtained by statically augmenting the symbolic encoding of the program by additional constraints. These constraints restrict the scheduler to choose from a minimal conditional stubborn set of transitions at each state. Another key contribution of the paper, is a new method for detecting transactions on-the-fly which takes into account patterns of lock acquisition and yields better reductions than existing methods which rely on a lockset based analysis. Moreover unlike existing techniques, identifying on-the-fly transactions does not require the program to follow a lock discipline in accessing shared variables. We have applied our techniques to the Daisy test bench and shown the existence of several bugs.