The Design of Rijndael
Examining Smart-Card Security under the Threat of Power Analysis Attacks
IEEE Transactions on Computers
Towards Sound Approaches to Counteract Power-Analysis Attacks
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
ElectroMagnetic Analysis (EMA): Measures and Counter-Measures for Smart Cards
E-SMART '01 Proceedings of the International Conference on Research in Smart Cards: Smart Card Programming and Security
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
CRYPTO '96 Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology
A Fast Software Implementation for Arithmetic Operations in GF(2n)
ASIACRYPT '96 Proceedings of the International Conference on the Theory and Applications of Cryptology and Information Security: Advances in Cryptology
Securing the AES Finalists Against Power Analysis Attacks
FSE '00 Proceedings of the 7th International Workshop on Fast Software Encryption
DES and Differential Power Analysis (The "Duplication" Method)
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
On Boolean and Arithmetic Masking against Differential Power Analysis
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
An Implementation of DES and AES, Secure against Some Attacks
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
A Sound Method for Switching between Boolean and Arithmetic Masking
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Multiplicative Masking and Power Analysis of AES
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Simplified Adaptive Multiplicative Masking for AES
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Integrated Design of AES (Advanced Encryption Standard) Encrypter and Decrypter
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
A generic method for secure Sbox implementation
WISA'07 Proceedings of the 8th international conference on Information security applications
Secure multiplicative masking of power functions
ACNS'10 Proceedings of the 8th international conference on Applied cryptography and network security
Provably secure s-box implementation based on fourier transform
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Dual-rail random switching logic: a countermeasure to reduce side channel leakage
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
An efficient masking scheme for AES software implementations
WISA'05 Proceedings of the 6th international conference on Information Security Applications
An algebraic masking method to protect AES against power attacks
ICISC'05 Proceedings of the 8th international conference on Information Security and Cryptology
AES side-channel countermeasure using random tower field constructions
Designs, Codes and Cryptography
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In implementing cryptographic algorithms on limited devices such as smart cards, speed and memory requirements had always presented a challenge. With the advent of side channel attacks, this task became even more difficult because a programmer must take into account countermeasures against such attacks, which often increases computational time, or memory requirements, or both. In this paper we describe a new method for secure implementation of the Advanced Encryption Standard algorithm. The method is based on a data masking technique, which is the most widely used countermeasure against power analysis and timing attacks at a software level. The change of element representation allows us to achieve an efficient solution that combines low memory requirements with high speed and resistance to attacks.