A proposal for a new block encryption standard
EUROCRYPT '90 Proceedings of the workshop on the theory and application of cryptographic techniques on Advances in cryptology
Towards Sound Approaches to Counteract Power-Analysis Attacks
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Bitslice Ciphers and Power Analysis Attacks
FSE '00 Proceedings of the 7th International Workshop on Fast Software Encryption
Securing the AES Finalists Against Power Analysis Attacks
FSE '00 Proceedings of the 7th International Workshop on Fast Software Encryption
DES and Differential Power Analysis (The "Duplication" Method)
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Power Analysis Attacks of Modular Exponentiation in Smartcards
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
IPA: A New Class of Power Attacks
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
On Boolean and Arithmetic Masking against Differential Power Analysis
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Investigations of power analysis attacks on smartcards
WOST'99 Proceedings of the USENIX Workshop on Smartcard Technology on USENIX Workshop on Smartcard Technology
A Countermeasure against One Physical Cryptanalysis May Benefit Another Attack
ICISC '01 Proceedings of the 4th International Conference Seoul on Information Security and Cryptology
Hamming Weight Attacks on Cryptographic Hardware - Breaking Masking Defense
ESORICS '02 Proceedings of the 7th European Symposium on Research in Computer Security
Attack and Improvement of a Secure S-Box Calculation Based on the Fourier Transform
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Algebraic Description and Simultaneous Linear Approximations of Addition in Snow 2.0.
ICICS '08 Proceedings of the 10th International Conference on Information and Communications Security
Combination of SW countermeasure and CPU modification on FPGA against power analysis
WISA'10 Proceedings of the 11th international conference on Information security applications
Provably secure s-box implementation based on fourier transform
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Enhanced DES implementation secure against high-order differential power analysis in smartcards
ACISP'05 Proceedings of the 10th Australasian conference on Information Security and Privacy
Secure and efficient AES software implementation for smart cards
WISA'04 Proceedings of the 5th international conference on Information Security Applications
Small size, low power, side channel-immune AES coprocessor: design and synthesis results
AES'04 Proceedings of the 4th international conference on Advanced Encryption Standard
Secure AES hardware module for resource constrained devices
ESAS'04 Proceedings of the First European conference on Security in Ad-hoc and Sensor Networks
Efficient and provably secure methods for switching from arithmetic to boolean masking
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Secure multiple SBoxes implementation with arithmetically masked input
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
Sleuth: automated verification of software power analysis countermeasures
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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Since the announcement of the Differential Power Analysis (DPA) by Paul Kocher and al., several countermeasures were proposed in order to protect software implementations of cryptographic algorithms. Inanattempt to reduce the resulting memory and executiontime overhead, a general method was recently proposed, consisting in "masking" all the intermediate data. This masking strategy is possible if all the fundamental operations used ina givenalgorithm canb e rewrittenwith masked input data, giving masked output data. This is easily seento be the case inclassical algorithms such as DES or RSA. However, for algorithms that combine boolean and arithmetic functions, such as IDEA or several of the AES candidates, two different kinds of masking have to be used. There is thus a need for a method to convert back and forth between boolean masking and arithmetic masking. A first solutionto this problem was proposed by Thomas Messerges in [15], but was unfortunately shown (see [6]) insufficient to prevent DPA. In the present paper, we present two new practical algorithms for the conversion, that are proven secure against DPA. The first one ("BooleanToArithmetic") uses a constant number of elementary operations, namely 7, on the registers of the processor. The number of elementary operations for the second one ("ArithmeticTo-Boolean"), namely 5K + 5, is proportional to the size K (inbits) of the processor registers.