A power-efficient processor core for reactive embedded applications

Authors:
Lei Yang;Morteza Biglari-Abhari;Zoran Salcic
Affiliations:
Department of Electrical and Computer Engineering, The University of Auckland, Auckland, New Zealand;Department of Electrical and Computer Engineering, The University of Auckland, Auckland, New Zealand;Department of Electrical and Computer Engineering, The University of Auckland, Auckland, New Zealand
Venue:
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Year:
2005

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Abstract

Reactive processors are a version of processors that provide architectural supports for the execution of reactive embedded applications. Even though much work has been done to improve the performance of reactive processors, the issue of optimizing power consumption has not been addressed. In this paper, we propose a new power-efficient processor core for reactive embedded applications. The new processor core (called ReMIC-PA) is implemented by adopting several power consumption optimizations to an existing reactive processor core (ReMIC). Initial benchmarking results show that ReMIC-PA achieves more than 20% power saving for data-dominated embedded applications and more than 50% power saving for control-dominated embedded applications when compared to ReMIC.