Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
A VLSI implementation of the blowfish encryption/decryption algorithm
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Cryptography and Network Security: Principles and Practice
Cryptography and Network Security: Principles and Practice
Fast DES Implementation for FPGAs and Its Application to a Universal Key-Search Machine
SAC '98 Proceedings of the Selected Areas in Cryptography
Description of a New Variable-Length Key, 64-bit Block Cipher (Blowfish)
Fast Software Encryption, Cambridge Security Workshop
A High-Performance Flexible Architecture for Cryptography
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Two Methods of Rijndael Implementation in Reconfigurable Hardware
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm)
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Implementation of Cryptographic Applications on the Reconfigurable FPGA Coprocessor microEnable
SBCCI '00 Proceedings of the 13th symposium on Integrated circuits and systems design
A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
SCOB, a soft-core for the blowfish cryptographic algorithm
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
An ASIC implementation of low power and high throughput blowfish crypto algorithm
Microelectronics Journal
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Blowfish is used in a wide variety of applications, involving large amounts of data, demanding high-speed encryption, flexible key sizes and various encryption modes. Even though the ASIC implementations have better encryption speeds and throughput than FPGA ones, their flexibility is restricted. In blowfish, key generation and encryption stages function disjointedly rendering it suitable for dynamic reconfiguration. Fiestal network of the algorithm is better suited for inner loop pipelining and loop folding. Combining these architectural features with dynamic reconfiguration and replication results in a proficient architecture for blowfish described in this paper as the DRIL architecture. This four-tier architecture, involving both hardware and software designs, focuses on efficient hardware utilization, higher throughput, flexibility and better performance. Further, DRIL is a platform independent architecture. Performance evaluation on the XILINX SPARTAN 2E and VIRTEX 2 devices showed very high utilization of the FPGA device with a throughput of 259.615 x R Mbps on SPARTAN 2E and 515.218 x R Mbps on VIRTEX 2 devices, where R is the replication factor.