IR-drop reduction through combinational circuit partitioning

Authors:
Hai Lin;Yu Wang;Rong Luo;Huazhong Yang;Hui Wang
Affiliations:
EE Department, Tsinghua University, Beijing, P.R. China;EE Department, Tsinghua University, Beijing, P.R. China;EE Department, Tsinghua University, Beijing, P.R. China;EE Department, Tsinghua University, Beijing, P.R. China;EE Department, Tsinghua University, Beijing, P.R. China
Venue:
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Year:
2006

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Abstract

IR-drop problem is becoming more and more important. Previous works dealing with power/ground (P/G) network peak current reduction to reduce the IR-drop problem only focus on synchronous sequential logic circuits which consider the combinational parts as unchangeable [4],[5]. However, some large combinational circuits which work alone in one clock cycle can create large current peaks and induce considerable IR-drops in the P/G network. In this paper, we propose a novel combinational circuit IR-drop reduction methodology using Switching Current Redistribution (SCR) method. A novel combinational circuit partitioning method is proposed to rearrange the switching current in different sub-blocks in order to reduce the current peak in the P/G network, while circuit function and performance are maintained. Experimental results show that, our method can achieve about 20% average reduction to the peak currents of the ISCAS85 benchmark circuits.