Ariadne—an adaptive router for fault-tolerant multicomputers

  • Authors:

  • J. D. Allen;P. T. Gaughan;D. E. Schimmel;S. Yalamanchili

  • Affiliations:

  • Computer Systems Research Laboratory, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA;Computer Systems Research Laboratory, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA;Computer Systems Research Laboratory, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA;Computer Systems Research Laboratory, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA

  • Venue:
  • ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
  • Year:
  • 1994

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Abstract

Adaptive routing has been proposed as a means of improving performance and fault-tolerance in multicomputer networks. While a number of algorithms have been proposed, few adaptive routers have been implemented in hardware. This paper presents the design and implementation of Ariadne --- a prototype single chip, hardware router. The primary motivation is tolerance to link and router failures, while reconciling conflicting demands on performance. This is achieved by implementing the m-misroute backtracking protocol (MB-m) using the pipelined circuitswitching (PCS) communication mechanism[17]. Ariadne implements two virtual data channels and one virtual control channel per physical link. The router is self-timed with single flit buffering at the input and output ports, and is fully adaptive.