Journal of VLSI Signal Processing Systems
VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization
Journal of VLSI Signal Processing Systems
A Survey on Lifting-based Discrete Wavelet Transform Architectures
Journal of VLSI Signal Processing Systems
An efficient folded architecture for lifting-based discrete wavelet transform
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal of Signal Processing Systems
Journal of Signal Processing Systems
Area- and power-efficient design of Daubechies wavelet transforms using folded AIQ mapping
IEEE Transactions on Circuits and Systems II: Express Briefs
International Journal of Intelligent Systems Technologies and Applications
CSS'11 Proceedings of the 5th WSEAS international conference on Circuits, systems and signals
Journal of Real-Time Image Processing
VLSI architectures for lifting based DWT: a detailed survey
Proceedings of the International Conference on Advances in Computing, Communications and Informatics
High speed VLSI implementation of lifting based DWT
Proceedings of the International Conference on Advances in Computing, Communications and Informatics
Hi-index | 35.68 |
In this paper, an efficient very large scale integration (VLSI) architecture, called flipping structure, is proposed for the lifting-based discrete wavelet transform. It can provide a variety of hardware implementations to improve and possibly minimize the critical path as well as the memory requirement of the lifting-based discrete wavelet transform by flipping conventional lifting structures. The precision issues are also analyzed. By case studies of the JPEG2000 default lossy (9,7) filter, an integer (9,7) filter, and the (6,10) filter, the efficiency of the proposed flipping structure is demonstrated.