Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Iterative Computer Algorithms with Applications in Engineering: Solving Combinatorial Optimization Problems
Microarchitectural techniques for power gating of execution units
Proceedings of the 2004 international symposium on Low power electronics and design
Power Gating with Multiple Sleep Modes
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Design and application of multimodal power gating structures
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
Dynamic power gating with quality guarantees
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Novel Vth Hopping Techniques for Aggressive Runtime Leakage Control
VLSID '10 Proceedings of the 2010 23rd International Conference on VLSI Design
A Robust and Reconfigurable Multi-mode Power Gating Architecture
VLSID '11 Proceedings of the 2011 24th International Conference on VLSI Design
Proceedings of the International Conference on Computer-Aided Design
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Recently, run-time sleep control scheme using multiple sleep modes have been studied. In those studies, each sleep mode has its own sleep depth. Deeper sleep mode provides higher leakage saving but incurs larger overhead energy.Use of multiple modes is helpful for further leakage saving if an appropriate mode is selected, but the best mode depends on the idle period whose length cannot be told in advance. Although the implementations how to realize different sleep depths have been well studied, few attention has been paid to the method of how to select the best sleep depth dynamically during execution. This paper proposes a simple but novel sleep control scheme, called stepwise sleep depth control, which aims to select the best depth among provided multiple sleep depths.Our scheme automatically applies deeper depth in a step-by-step manner after an idle state starts. It successfully reduces leakage energy while only a small modification is required for circuit implementation. This paper also proposes a methodology for optimizing control parameters of our sleep control scheme according to program behavior and temperature. Experimental result shows that stepwise sleep depth control applied to body biasing circuit improves net leakage saving of up to 43% for FPAlu at 1.0GHz, 75°C compared to conventional reverse body biasing.