Logic synthesis for reliability—an early start to controlling electromigration and hot carrier effects

  • Authors:
  • Kaushik Roy;Sharat Prasad

  • Affiliations:
  • School of Electrical Engineering, Purdue University, West Lafayette, Indiana;Integrated Systems Laboratory, Texas Instruments, Dallas, Texas

  • Venue:
  • EURO-DAC '94 Proceedings of the conference on European design automation
  • Year:
  • 1994

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Abstract