Clock routing for high-performance ICs
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Low-cost single-layer clock trees with exact zero Elmore delay skew
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Perfect-balance planar clock routing with minimal path-length
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Low-cost single-layer clock trees with exact zero Elmore delay skew
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
On the bounded-skew clock and Steiner routing problems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Bounded-skew clock and Steiner routing under Elmore delay
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Practical Bounded-Skew Clock Routing
Journal of VLSI Signal Processing Systems - Special issue on high performance clock distribution networks
Multi-level genetic algorithm (MLGA) for the construction of clock binary tree
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
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