Proceedings of the 1997 international symposium on Physical design
The rectilinear Steiner arborescence problem is NP-complete
SODA '00 Proceedings of the eleventh annual ACM-SIAM symposium on Discrete algorithms
Online multicast routing with bandwidth guarantees: a new approach using multicast network flow
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
A comparative study of two Boolean formulations of FPGA detailed routing constraints
Proceedings of the 2001 international symposium on Physical design
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Using satisfiability in application-dependent testing of FPGA interconnects
Proceedings of the 40th annual Design Automation Conference
Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Online multicast routing with bandwidth guarantees: a new approach using multicast network flow
IEEE/ACM Transactions on Networking (TON)
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints
IEEE Transactions on Computers
Application-Specific Bridging Fault Testing of FPGAs
Journal of Electronic Testing: Theory and Applications
Application-dependent testing of FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
FPGA Design Automation: A Survey
Foundations and Trends in Electronic Design Automation
Contraction-based steiner tree approximations in practice
ISAAC'11 Proceedings of the 22nd international conference on Algorithms and Computation
Dual partitioning multicasting for high-performance on-chip networks
Journal of Parallel and Distributed Computing
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Motivated by the goal of increasing the performance of FPGA-based designs, we propose new Steiner and arborescence FPGA routing algorithms. Our Steiner tree constructions significantly outperform the best known ones and have provably good performance bounds. Our arborescence heuristics produce routing solutions with optimal source-sink pathlengths, and with wirelength on par with the best existing Steiner tree heuristics. We have incorporated these algorithms into an actual FPGA router, which routed a number of industrial circuits using channel width considerably smaller than is achievable by previous routers. Our routing results for both the 3000 and 4000-series Xilinx parts are currently the best known in the Literature