Analysis of composition complexity and how to obtain smaller canonical graphs
Proceedings of the 37th Annual Design Automation Conference
Automatic partitioning for efficient combinatorial verification
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Combinational and sequential equivalence checking
Logic Synthesis and Verification
Solving the latch mapping problem in an industrial setting
Proceedings of the 40th annual Design Automation Conference
Identifying Redundant Gate Replacements in Verification by Error Modeling
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Design Verification by Test Vectors and Arithmetic Transform Universal Test Set
IEEE Transactions on Computers
Efficient equivalence checking with partitions and hierarchical cut-points
Proceedings of the 41st annual Design Automation Conference
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Combinational verification is a co-NP complete problem. However, in reality, several techniques exist which perform reasonably well on many practical circuits. Also, it is often found that while one technique efficiently verifies a given circuit it fails badly on another circuit, whereas a certain other technique is efficient on the latter circuit but cannot handle the former circuit. Therefore, clearly, a robust verification methodology cannot depend on any single technique. Our goal in this research is to build a verification methodology whose performance is more immune to circuit variations. We have developed a methodology where several fundamentally different techniques can be combined to provide efficient heuristic solutions to combinational verification, and possibly other intractable problems as well. Such an integrated methodology is far more robust and efficient on a majority of combinational verification problems than any single existing technique. In this paper, we discuss the methodology in detail and present verification results using a fully automated prototype of the proposed methodology. Using this methodology, we can verify many circuits which could not be efficiently verified using any published techniques available to us, and even by some popular commercial combinational verification programs