An orthogonal simulated annealing algorithm for large floorplanning problems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
This paper presents a cost-effective area-IO DRAM A CAD Tool and Algorithms
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Improved method of cell placement with symmetry constraints for analog IC layout design
Proceedings of the 2006 international symposium on Physical design
Module placement for fault-tolerant microfluidics-based biochips
Proceedings of the 41st annual Design Automation Conference
A stable fixed-outline floorplanning method
Proceedings of the 2007 international symposium on Physical design
A fast algorithm for rectilinear block packing based on selected sequence-pair
Integration, the VLSI Journal
Multi-layer floorplanning for stacked ICs: Configuration number and fixed-outline constraints
Integration, the VLSI Journal
Practically scalable floorplanning with voltage island generation
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
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Murata et al. (1996) introduced an elegant representation of block placement called sequence pair. All block-placement algorithms that are based on sequence pairs use simulated annealing where the generation and evaluation of a large number of sequence pairs is required. Therefore, a fast algorithm is needed to evaluate each generated sequence pair, i.e., to translate the sequence pair to its corresponding block placement. This paper presents a new approach to evaluate a sequence pair based on computing longest common subsequence in a pair of weighted sequences. We present a very simple and efficient O(n2) algorithm to solve the sequence pair evaluation problem. We also show that using a more sophisticated data structure, the algorithm can be implemented to run in O (n log log n) time. Both implementations of our algorithm are significantly faster than the previous O(n2) graph-based algorithm. For example, we achieve 60 × speedup over the previous algorithm when input size n = 128. As a result, we can examine a million sequence pairs within one minute for typical input size of placement problems. For all MCNC benchmark block-placement problems, we have obtained the best results ever reported in the literature (including those reported by algorithms based on O tree and B* tree) with significantly less runtime. For example, the best known result for ami49 (36.8 mm2) was obtained by a B*-tree-based algorithm using 4752 s and we obtained a better result (36.5 mm2) in 31 s