Improved method of cell placement with symmetry constraints for analog IC layout design

  • Authors:
  • Shinichi Kouda;Chikaaki Kodama;Kunihiro Fujiyoshi

  • Affiliations:
  • Tokyo University of Agriculture and Technology, Tokyo, Japan;Tokyo University of Agriculture and Technology, Tokyo, Japan;Tokyo University of Agriculture and Technology, Tokyo, Japan

  • Venue:
  • Proceedings of the 2006 international symposium on Physical design
  • Year:
  • 2006

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Abstract

Recently, it is often required in high performance analog IC design that some cells are placed symmetrically to horizontal or vertical axis. Balasa et al. proposed a method of obtaining the closest placement satisfying the given symmetry constraints and the topology constraints imposed by a sequence-pair, but this method has the following defects: (1) Some cells overlap each other. (2) The closest cell placement satisfying both the symmetry and topology constraints may not be obtained. (3) How to place cells symmetrically is mentioned only for one axis and there is no explanation for plural axes. In this paper, we propose an efficient method to obtain the closest cell placement satisfying the given symmetry constraints and the topology constraints imposed by a sequence-pair using linear programming. The proposed method obtains a simple constraint graph from a sequence-pair and derives a set of linear constraint expressions from the graph. The number of linear expressions decreases by substituting the expressions for dependent variables. Then the solutions are obtained by linear programming. The effectiveness of the proposed method was shown by computational experiments.