Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Arbitrary rectilinear block packing based on sequence pair
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Block placement with symmetry constraints based on the O-tree non-slicing representation
Proceedings of the 37th Annual Design Automation Conference
Fast evaluation of sequence pair in block placement by longest common subsequence computation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
FLUTE: fast lookup table based wirelength estimation technique
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Placement with symmetry constraints for analog layout design using TCG-S
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Improved method of cell placement with symmetry constraints for analog IC layout design
Proceedings of the 2006 international symposium on Physical design
Analog placement with symmetry and other placement constraints
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Analog placement based on novel symmetry-island formulation
Proceedings of the 44th annual Design Automation Conference
Analog placement with common centroid constraints
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Symmetry-aware placement with transitive closure graphs for analog layout design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Automation of IC layout with analog constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Symmetry within the sequence-pair representation in the context of placement for analog design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the exploration of the solution space in analog placement with symmetry constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Regularity-constrained floorplanning for multi-core processors
Proceedings of the 2011 international symposium on Physical design
Proceedings of the 48th Design Automation Conference
Heterogeneous B*-trees for analog placement with symmetry and regularity considerations
Proceedings of the International Conference on Computer-Aided Design
Practical placement and routing techniques for analog circuit designs
Proceedings of the International Conference on Computer-Aided Design
Routability-driven placement algorithm for analog integrated circuits
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Performance-driven analog placement considering monotonic current paths
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the International Conference on Computer-Aided Design
Regularity-constrained floorplanning for multi-core processors
Integration, the VLSI Journal
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In this paper, we will present a placement method for analog circuits. We consider both common centroid and 1-D symmetry constraints, which are the two most common types of placement requirements in analog designs. The approach is based on a symmetric feasible condition on the sequence pair representation that can cover completely the set of all placements satisfying the common centroid and 1-D symmetry constraints. This condition is essential for a good searching process to solve the problem effectively. Symmetric placement is an important step to achieve matchings of other electrical properties like delay and temperature variation. We have compared our results with those presented in the most updated previous works. Significant improvements can be obtained by our approach in both common centroid and 1-D symmetry placements, and we are the first who can handle both constraints simultaneously.