HW/SW partitioning techniques for multi-mode multi-task embedded applications
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A HW/SW Partitioner for Multi-Mode Multi-Task Embedded Applications
Journal of VLSI Signal Processing Systems
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Energy optimization of multiprocessor systems on chip by voltage selection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Embedded Computing Systems (TECS)
A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification
Journal of Signal Processing Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Proceedings of the Conference on Design, Automation and Test in Europe
Dynamic and adaptive allocation of applications on MPSoC platforms
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Customer-aware task allocation and scheduling for multi-mode MPSoCs
Proceedings of the 48th Design Automation Conference
Symbolic design space exploration for multi-mode reconfigurable systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A novel requirement analysis approach for periodic control systems
Frontiers of Computer Science: Selected Publications from Chinese Universities
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We present a novel co-design methodology for the synthesis of energy-efficient embedded systems. In particular, we concentrate on distributed embedded systems that accommodate several different applications within a single device, i.e., multimode embedded systems. Based on the key observation that operational modes are executed with different probabilities, that is, the system spends uneven amounts of time in the different modes, we develop a new co-design technique that exploits this property to significantly reduce energy dissipation. Energy and cost savings are achieved through a suitable synthesis process that yields better hardware-resource-sharing opportunities. We conduct several experiments, including a realistic smart phone example, that demonstrate the effectiveness of our approach. Reductions in power consumption of up to 64% are reported.