Proceedings of the 6th international workshop on Hardware/software codesign
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Low power system scheduling and synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints
Proceedings of the tenth international symposium on Hardware/software codesign
Critical path driven cosynthesis for heterogeneous target architectures
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
Benefits and challenges for platform-based design
Proceedings of the 41st annual Design Automation Conference
The Case for Lifetime Reliability-Aware Microprocessors
Proceedings of the 31st annual international symposium on Computer architecture
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
ASAP '04 Proceedings of the Application-Specific Systems, Architectures and Processors, 15th IEEE International Conference
Thermal-Aware Task Allocation and Scheduling for Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Reliable multiprocessor system-on-chip synthesis
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Approximation algorithm for the temperature-aware scheduling problem
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
High-Speed VLSI Interconnections
High-Speed VLSI Interconnections
Multi-mechanism reliability modeling and management in dynamic systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms
Proceedings of the Conference on Design, Automation and Test in Europe
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Customer-aware task allocation and scheduling for multi-mode MPSoCs
Proceedings of the 48th Design Automation Conference
Mapping of applications to MPSoCs
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Symbolic design space exploration for multi-mode reconfigurable systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Combined heuristics for synthesis of SOCs with time and power constraints
Computers and Electrical Engineering
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Communication and migration energy aware task mapping for reliable multiprocessor systems
Future Generation Computer Systems
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In this paper, we consider energy minimization for multiprocessor system-on-a-chip (MPSoC) under lifetime reliability constraint of the system, which has become a serious concern for the industry with technology scaling. As today's complex embedded systems typically have multiple execution modes, we first identify a set of "good" task allocation and schedules for each execution mode in terms of lifetime reliability and/or energy consumption, and then we introduce novel techniques to obtain an optimal combination of these singlemode solutions, which is able to minimize the energy consumption of the entire multi-mode system while satisfying given lifetime reliability constraint. Experimental results on several hypothetical MPSoC platforms with various task graphs demonstrate the effectiveness of the proposed approach.