Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Bandwidth-centric optimisation for area-constrained links with crosstalk avoidance methods
Proceedings of the conference on Design, automation and test in Europe
Serial-link bus: a low-power on-chip bus architecture
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A flexible parallel simulator for networks-on-chip with error control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Throughput optimization for area-constrained links with crosstalk avoidance methods
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient CODEC designs for crosstalk avoidance codes based on numeral systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips
Microprocessors & Microsystems
Self-calibrated energy-efficient and reliable channels for on-chip interconnection networks
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
| Hi-index | 0.03 |
A reliable high-speed bus employing low-swing signaling can be designed by encoding the bus to prevent crosstalk and provide error correction. Coding for on-chip buses requires additional bus wires and codec circuits. In this paper, fundamental bounds on the number of wires required to provide joint crosstalk avoidance and error correction using memoryless codes are presented. The authors propose a code construction that results in practical codec circuits with the number of wires being within 35% of the fundamental bounds. When applied to a 10-mm 32-bit bus in a 0.13-mum CMOS technology with low-swing signaling, one of the proposed codes provides 2.14times speedup and 27.5% energy savings at the cost of 2.1times area overhead, but without any loss in reliability