Automatic generation of hardware dependent software for MPSoCs from abstract system specifications
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Model Based Synthesis of Embedded Software
SEUS '08 Proceedings of the 6th IFIP WG 10.2 international workshop on Software Technologies for Embedded and Ubiquitous Systems
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
ACM Transactions on Embedded Computing Systems (TECS)
System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
Hardware-dependent software synthesis for many-core embedded systems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Fast and accurate processor models for efficient MPSoC design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Platform modeling for exploration and synthesis
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Synthesis of optimized hardware transactors from abstract communication specifications
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Microprocessors & Microsystems
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With growing market pressures and rising system complexities, automated system-level communication design with efficient design space exploration capabilities is becoming increasingly important. At the same time, customized network-oriented communication architectures become necessary in enabling a high-performance communication among the system components. To this end, corresponding communication design flows that are supported by efficient design automation techniques need to be developed. In this paper, we present a system-level design environment for the generation of bus-based system-on-chip architectures. Our approach supports a two-stage design flow using automated model refinement toward custom heterogeneous communication networks. Starting from an abstract specification of the desired communication channels, our environment automatically generates tailored network models at various levels of abstraction. At its core, an automatic layer-based refinement approach is utilized. We have applied our approach to a set of industrial-strength examples with a wide range of target architectures. Our experimental results show significant productivity gains over a traditional communication design, allowing early and rapid design space exploration.