Synchronizing Large VLSI Processor Arrays
IEEE Transactions on Computers
An Upper Bound on Expected Clock Skew in Synchronous Systems
IEEE Transactions on Computers
IEEE Transactions on Computers
Performance of Synchronous and Asynchronous Schemes for VLSI Systems
IEEE Transactions on Computers
IEEE Design & Test
Clocking Arbitrarily Large Computing Structures Under Constant Skew Bound
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
On the Complexity of Designing Optimal Branch-and-Combine Clock Networks
IEEE Transactions on Computers
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In a recent development a new clock distribution scheme has been introduced. The scheme called Branch-and-Combine or BaC, is the first to guarantee constant skew bound regardless of network size. In this paper we generalize and extend the work on BaC networks. Our study takes the approach of defining a general graph theoretic model which is then utilized to define a general network model taking into account node function. We use the models to establish some interesting results on clocking paths, node input sequences, node inputs' relative timings, and skew bound. We prove that a network adhering to our general model is stable (will not oscillate) despite its cyclic nature. We also prove that no tree of any kind can be used to distribute the clock in two or more dimensions such that skew bound is constant. The paper then exploits the derived properties to describe the inherent interplay between topology, timing, node function, and skew bound.Index Terms驴Branch-and-combine network, clock distribution, skew bound, synchronous system, VLSI, large system, network stability, cyclic clock networks.