Fundamentals of interactive computer graphics
Fundamentals of interactive computer graphics
Fast constructive-solid geometry display in the pixel-powers graphics system
SIGGRAPH '86 Proceedings of the 13th annual conference on Computer graphics and interactive techniques
A parallel processor architecture for graphics arithmetic operations
SIGGRAPH '87 Proceedings of the 14th annual conference on Computer graphics and interactive techniques
VLSI drawing processor utilizing multiple parallel scan-line processors
Advances in computer graphics hardware II
Fast image generation of construcitve solid geometry using a cellular array processor
SIGGRAPH '85 Proceedings of the 12th annual conference on Computer graphics and interactive techniques
Fast spheres, shadows, textures, transparencies, and imgage enhancements in pixel-planes
SIGGRAPH '85 Proceedings of the 12th annual conference on Computer graphics and interactive techniques
CSG Hidden Surface Algorithms for VLSI Hardware Systems
Advances in Computer Graphics Hardware I (Eurographics'86 Workshop)
Geometric modelling and display primitives towards specialised hardware
SIGGRAPH '83 Proceedings of the 10th annual conference on Computer graphics and interactive techniques
The Geometry Engine: A VLSI Geometry System for Graphics
SIGGRAPH '82 Proceedings of the 9th annual conference on Computer graphics and interactive techniques
An expandable multiprocessor architecture for video graphics (Preliminary Report)
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Simulation and expected performance analysis of multiple processor Z-buffer systems
SIGGRAPH '80 Proceedings of the 7th annual conference on Computer graphics and interactive techniques
A parallel processor system for three-dimensional color graphics
SIGGRAPH '84 Proceedings of the 11th annual conference on Computer graphics and interactive techniques
Depth-Buffering Display Techniques for Constructive Solid Geometry
IEEE Computer Graphics and Applications
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A graphics workstation should offer both a wide variety of 2D and 3D realtime display functions as well as a programmable parallel-processing capacity for large processing tasks. A system concept is proposed that meets these requirements by offering a multi-processor configuration with general-purpose programmable processors, enhanced with specific logic that can perform for each node a large number of simple pixel operations in parallel.