Computer arithmetic algorithms
Computer arithmetic algorithms
HOPE: an efficient parallel fault simulator for synchronous sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Accumulator-Based Compaction of Test Responses
IEEE Transactions on Computers
Fast hierarchical multi-level fault simulation of sequential circuits with switch-level accuracy
DAC '93 Proceedings of the 30th international Design Automation Conference
Test pattern generation based on arithmetic operations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Behavioral-Level Fault Simulation
IEEE Design & Test
Arithmetic built-in self test for high-level synthesis
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Design for Testability Techniques at the Behavioraland Register-Transfer Levels
Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis
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