Functional level simulation in FANSIM3 - algorithms, data structures and results
DAC '81 Proceedings of the 18th Design Automation Conference
Integrated techniques for functional and gate-level digital logic simulation
DAC '73 Proceedings of the 10th Design Automation Workshop
An accurate functional level concurrent fault simulator
DAC '80 Proceedings of the 17th Design Automation Conference
A multiple delay simulator for MOS LSI circuits
DAC '80 Proceedings of the 17th Design Automation Conference
ADLIB user''s manual
Software accelerated functional fault simulation for data-path architectures
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Design for Testability Techniques at the Behavioraland Register-Transfer Levels
Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis
A Behavioral Fault Simulator for Ideal
IEEE Design & Test
A Fault Injection Technique for VHDL Behavioral-Level Models
IEEE Design & Test
Validation Vector Grade (VVG): A New Coverage Metric for Validation and Test
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
REGISTER-TRANSFER LEVEL FAULT MODELING AND TEST EVALUATION TECHNIQUES FOR VLSI CIRCUITS
ITC '00 Proceedings of the 2000 IEEE International Test Conference
SystemC
A proposed hardware fault simulation engine
EURO-DAC '91 Proceedings of the conference on European design automation
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An approach to fault simulation is presented in which behavioral fault models represent complex failures in VLSI designs. Errors are deliberately introduced into the description of a design that contains no faults. These errors can be fault values of variables that represent state or timing parameters, a faulty description that is substituted for part of the good description, or a combination of these. The algorithm guarantees accurate results by deferring the output assignments. The approach can also be used to detect and discard inconsistent output assignments. The algorithm has been implemented in Stanford University's Sable simulator using the Adlib behavioral modeling language.