Concurrent Error Detection Using Watchdog Processors-A Survey
IEEE Transactions on Computers
Fault Injection Techniques and Tools for Embedded Systems
Fault Injection Techniques and Tools for Embedded Systems
Soft-Error Detection Using Control Flow Assertions
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core
DSN '05 Proceedings of the 2005 International Conference on Dependable Systems and Networks
Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring
IEEE Transactions on Computers
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
Design and Evaluation of a Hardware on-line Program-Flow Checker for Embedded Microcontrollers
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
FEDC: Control Flow Error Detection and Correction for Embedded Systems without Program Interruption
ARES '08 Proceedings of the 2008 Third International Conference on Availability, Reliability and Security
Control-Flow Checking Using Branch Instructions
EUC '08 Proceedings of the 2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing - Volume 01
On-line control flow error detection using relationship signatures among basic blocks
Computers and Electrical Engineering
A Simulation Environment for the On-Line Monitoring of a Fault Tolerant Flight Control Computer
ECBS-EERC '09 Proceedings of the 2009 First IEEE Eastern European Conference on the Engineering of Computer Based Systems
Improving chip multiprocessor reliability through code replication
Computers and Electrical Engineering
Mitigation of soft errors in SRAM-based FPGAs using CAD tools
Computers and Electrical Engineering
Continuous signature monitoring: low-cost concurrent detection of processor control errors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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A previously proposed technique for on-line monitoring of program control flow is extensively evaluated in the paper. This technique, which employs an external monitor, is briefly described. The performance evaluation was carried out in a specially designed simulation environment that can inject artificial faults according to the single bit-flip model. The faults were injected in the processor itself, on the bus lines and in the memory. An evaluation study was conducted with a representative benchmark program. First, the memory overhead and execution time overhead of the monitored program were obtained. Then, typical performance indicators such as error detection and latency were presented for the different fault categories itemized by the location and means of detection. The results thoroughly discussed in this paper show that the technique is able to detect a high percentage of the injected faults manifested as control flow errors with an acceptable time and memory overhead.