DAC '97 Proceedings of the 34th annual Design Automation Conference
Rapid Development: Taming Wild Software Schedules
Rapid Development: Taming Wild Software Schedules
Software Reuse Research: Status and Future
IEEE Transactions on Software Engineering
NetFPGA--An Open Platform for Gigabit-Rate Network Switching and Routing
MSE '07 Proceedings of the 2007 IEEE International Conference on Microelectronic Systems Education
Patterns in Network Architecture: A Return to Fundamentals
Patterns in Network Architecture: A Return to Fundamentals
Contemplating systematic software reuse in a project-centric company
Proceedings of the 2008 annual research conference of the South African Institute of Computer Scientists and Information Technologists on IT research in developing countries: riding the wave of technology
Kiwi: Synthesis of FPGA Circuits from Parallel Programs
FCCM '08 Proceedings of the 2008 16th International Symposium on Field-Programmable Custom Computing Machines
Packet header analysis and field extraction for multigigabit networks
DDECS '09 Proceedings of the 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits&Systems
A Packet Generator on the NetFPGA Platform
FCCM '09 Proceedings of the 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
Proceedings of the ACM SIGCOMM 2010 conference
400 Gb/s Programmable Packet Parsing on a Single FPGA
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Flexible high performance traffic generation on commodity multi---core platforms
TMA'12 Proceedings of the 4th international conference on Traffic Monitoring and Analysis
Is there a Moore's law for bandwidth?
IEEE Communications Magazine
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Ever increasing traffic quantities and link-bandwidths force network devices to meet ever-increasing demands; the march to 100G is well under way. The high-speed networking of today is no longer that of five years ago: Unfortunately, such growth contrasts with current financial forces and this leads organisations to find ways to save money. As a result many developers face the common problem: how to make existing, systems reusable in this new, higher-speed scenario? To attack this problem, we propose new, flexible, legacy support mechanics for designs built using System on a Chip (SoC) and System on FPGA (SoFPGA). We illustrate our approach using the widely used, open-source, NetFPGA platform presenting a migration path for existing 1G designs to plugin into the new NetFPGA 10G board without alteration to code structure.