Cleaning policies in mobile computers using flash memory
Journal of Systems and Software
On efficient wear leveling for large-scale flash-memory storage systems
Proceedings of the 2007 ACM symposium on Applied computing
A group-based wear-leveling algorithm for large-capacity flash memory storage systems
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
STAFF: A flash driver algorithm minimizing block erasures
Journal of Systems Architecture: the EUROMICRO Journal
A survey of Flash Translation Layer
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the 46th Annual Design Automation Conference
Performance Improvement for Flash Memories Using Loop Optimization
CSE '09 Proceedings of the 2009 International Conference on Computational Science and Engineering - Volume 02
Characterizing flash memory: anomalies, observations, and applications
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Janus-FTL: finding the optimal point on the spectrum between page and block mapping schemes
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
SAT: Switchable Address Translation for Flash Memory Storages
COMPSAC '10 Proceedings of the 2010 IEEE 34th Annual Computer Software and Applications Conference
ROSE: A Novel Flash Translation Layer for NAND Flash Memory Based on Hybrid Address Translation
IEEE Transactions on Computers
MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems
Proceedings of the 48th Design Automation Conference
A Demand-Based FTL Scheme Using Dualistic Approach on Data Blocks and Translation Blocks
RTCSA '11 Proceedings of the 2011 IEEE17th International Conference on Embedded and Real-Time Computing Systems and Applications - Volume 01
S-FTL: An efficient address translation for flash memory by exploiting spatial locality
MSST '11 Proceedings of the 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies
Delta-FTL: improving SSD lifetime via exploiting content locality
Proceedings of the 7th ACM european conference on Computer Systems
A dual-grained FTL for flash memory
DASFAA'12 Proceedings of the 17th international conference on Database Systems for Advanced Applications
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
DuLASP: A Workload-Aware Flash Translation Layer Exploiting both Temporal and Spatial Localities
RTCSA '12 Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
MNK: Configurable Hybrid Flash Translation Layer for Multi-Channel SSD
CSE '12 Proceedings of the 2012 IEEE 15th International Conference on Computational Science and Engineering
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Since the introduction of the first flash memory in 1984, flash memory has been a very important member of the non-volatile semiconductor memory family due to its advantages, such as high density, low-cost, shock resistance, fast access time, low-power consumption and reliability. Despite the advantages, flash memory is still facing many technical limitations that need to be further studied. Various solutions have been developed to improve the performance of flash memory by overcoming the technical limitations; however, flash translation layer has a great impact on the overall performance improvement due to its cost-efficiency and usefulness. In this paper, three main aspects of flash memory are discussed from a perspective of flash translation layer. First, we discuss and classify flash translation layer based on the mapping method. Second, we discuss the current technical limitations that flash memory is facing and how these can be overcome by adopting flash translation layer. Third, we investigate the latest flash translation layer schemes that have been recently studied and proposed, and analyse their advantages and drawbacks.