A reuse scenario for the VHDL-based hardware design flow

  • Authors:
  • Viktor Preis;Renate Henftling;Markus Schütz;Sabine März-Rössel

  • Affiliations:
  • Siemens AG, Corporate Research and Development, ZFE T SE 5, D-81730 Munich;Siemens AG, Corporate Research and Development, ZFE T SE 5, D-81730 Munich;Siemens AG, Corporate Research and Development, ZFE T SE 5, D-81730 Munich;Siemens AG, Corporate Research and Development, ZFE T SE 5, D-81730 Munich

  • Venue:
  • EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
  • Year:
  • 1995

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Abstract