Increasing design quality and engineering productivity through design reuse
DAC '93 Proceedings of the 30th international Design Automation Conference
Reuse of design objects in CAD frameworks
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Sixteen questions about software reuse
Communications of the ACM
Information model of a compound graph representation for system and architecture level design
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
A reuse scenario for the VHDL-based hardware design flow
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
VHDL based design methodology for hierarchy and component re-use
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Object-oriented hardware modelling—where to apply and what are the objects?
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Behavioral Synthesis and Component Reuse with VHDL
Behavioral Synthesis and Component Reuse with VHDL
Design reuse through high-level library mapping
EDTC '95 Proceedings of the 1995 European conference on Design and Test
An efficient reuse system for digital circuit design
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Linking codesign and reuse in embedded systems design
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Functional abstraction driven design space exploration of heterogeneous programmable architectures
Proceedings of the 14th international symposium on Systems synthesis
Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Generic integration infrastructure for IP-based design processes and tools with a unified XML format
Integration, the VLSI Journal - Special issue: IP and design reuse
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In this paper a number of reuse approaches for circuit design are analysed. Based on this analysis an algebraic core model for discussion of a general reuse strategy is proposed. Using this model, the aim is to classify different reuse approaches for circuit design, to compare the applied terms and definitions, and to formulate classes of typical reuse tasks. In a practical application with focus on retrieval and parameterisation techniques, this model is on the way to being applied to DSP design issues.