Fault-Tolerance Through Scheduling of Aperiodic Tasks in Hard Real-Time Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Tolerance to Multiple Transient Faults for Aperiodic Tasks in Hard Real-Time Systems
IEEE Transactions on Computers
Energy-Efficient Duplex and TMR Real-Time Systems
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Dynamic scheduling strategies for shared-memory multiprocessors
ICDCS '96 Proceedings of the 16th International Conference on Distributed Computing Systems (ICDCS '96)
Fault Recovery Based on Checkpointing for Hard Real-Time Embedded Systems
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
An Analysis of EDF Schedulability on a Multiprocessor
IEEE Transactions on Parallel and Distributed Systems
Non-Preemptive Interrupt Scheduling for Safe Reuse of Legacy Drivers in Real-Time Systems
ECRTS '05 Proceedings of the 17th Euromicro Conference on Real-Time Systems
Exact Fault-Sensitive Feasibility Analysis of Real-Time Tasks
IEEE Transactions on Computers
Exploring locking & partitioning for predictable shared caches on multi-cores
Proceedings of the 45th annual Design Automation Conference
Scheduling of fault-tolerant embedded systems with soft and hard timing constraints
Proceedings of the conference on Design, automation and test in Europe
Synthesis of fault-tolerant embedded systems
Proceedings of the conference on Design, automation and test in Europe
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
RTAS '08 Proceedings of the 2008 IEEE Real-Time and Embedded Technology and Applications Symposium
Energy Efficient Scheduling of Real-Time Tasks on Multicore Processors
IEEE Transactions on Parallel and Distributed Systems
Architectural core salvaging in a multi-core processor for hard-error tolerance
Proceedings of the 36th annual international symposium on Computer architecture
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Efficient program scheduling for heterogeneous multi-core processors
Proceedings of the 46th Annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scheduling Parallel Real-Time Tasks on Multi-core Processors
RTSS '10 Proceedings of the 2010 31st IEEE Real-Time Systems Symposium
A survey of hard real-time scheduling for multiprocessor systems
ACM Computing Surveys (CSUR)
Multi-core Real-Time Scheduling for Generalized Parallel Task Models
RTSS '11 Proceedings of the 2011 IEEE 32nd Real-Time Systems Symposium
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Harmonic semi-partitioned scheduling for fixed-priority real-time tasks on multi-core platform
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |
This paper presents a dynamic scheduling for real-time tasks in multicore processors to tolerate single and multiple transient faults. The scheduling is performed based on three important issues: (1) current released tasks, (2) current available processor cores, and (3) consideration of the number of faults and their occurrences. Using tasks utilization along with a defined criticality threshold in the proposed scheduling method, current ready tasks are divided into critical- and noncritical ones. Based on whether a task is critical or noncritical, an appropriate fault-tolerance policy is exploited. Moreover, scheduling decisions are made to fulfill two key goals: (1) increasing scheduling feasibility and (2) decreasing the total tasks execution time. Several simulation experiments are carried out to compare the proposed method with two well-known methods, called checkpointing with rollback recovery and hardware replication. Experimental results reveal that in the presence of multiple transient faults, the feasibility rate of the proposed method is considerably higher than the other well-known fault-tolerance methods. Moreover, the average timing overhead of this method is lower than the traditional methods.