Determining Redundancy Levels for Fault Tolerant Real-Time Systems
IEEE Transactions on Computers - Special issue on fault-tolerant computing
Optimal Deadline Assignment for Scheduling Soft Aperiodic Tasks in Hard Real-Time Environments
IEEE Transactions on Computers
Tolerance to Multiple Transient Faults for Aperiodic Tasks in Hard Real-Time Systems
IEEE Transactions on Computers
Real-Time Systems: Design Principles for Distributed Embedded Applications
Real-Time Systems: Design Principles for Distributed Embedded Applications
A Fault-Tolerant Scheduling Algorithm for Real-Time Periodic Tasks with Possible Software Faults
IEEE Transactions on Computers
Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Reliability-Aware Co-Synthesis for Embedded Systems
ASAP '04 Proceedings of the Application-Specific Systems, Architectures and Processors, 15th IEEE International Conference
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Tolerating faults while maximizing reward
Euromicro-RTS'00 Proceedings of the 12th Euromicro conference on Real-time systems
Transparent recovery from intermittent faults in time-triggered distributed systems
IEEE Transactions on Computers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis of fault-tolerant embedded systems
Proceedings of the conference on Design, automation and test in Europe
Symbolic voter placement for dependability-aware system synthesis
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Exploiting data-redundancy in reliability-aware networked embedded system design
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Profit and penalty aware (PP-aware) scheduling for tasks with variable task execution time
Proceedings of the 2010 ACM Symposium on Applied Computing
Task migration for fault-tolerance in mixed-criticality embedded systems
ACM SIGBED Review - Special Issue on the 2nd International Workshop on Adaptive and Reconfigurable Embedded Systems (APRES'09)
Cost-effective safety and fault localization using distributed temporal redundancy
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Synthesis of communication schedules for TTEthernet-based mixed-criticality systems
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Failure-Aware Task Scheduling of Synchronous Data Flow Graphs Under Real-Time Constraints
Journal of Signal Processing Systems
DFTS: A dynamic fault-tolerant scheduling for real-time tasks in multicore processors
Microprocessors & Microsystems
| Hi-index | 0.00 |
In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarantee the deadlines for the hard processes even in the case of faults, while maximizing the overall utility. We use time/utility functions to capture the utility of soft processes. Process re-execution is employed to recover from multiple faults. A single static schedule computed off-line is not fault tolerant and is pessimistic in terms of utility, while a purely online approach, which computes a new schedule every time a process fails or completes, incurs an unacceptable overhead. Thus, we use a quasi-static scheduling strategy, where a set of schedules is synthesized off-line and, at run time, the scheduler will select the right schedule based on the occurrence of faults and the actual execution times of processes. The proposed schedule synthesis heuristics have been evaluated using extensive experiments.